NDCODE repository - simavr.git/commit

author	ga <ga@oldell.fish>
	Thu, 21 Jan 2021 15:30:19 +0000 (15:30 +0000)
committer	ga <ga@oldell.fish>
	Thu, 21 Jan 2021 15:30:19 +0000 (15:30 +0000)
commit	eec2e5aae40d0831c385b6f8ff91fac466b4bb7b
tree	7238f2716d6b6f1907a9f004930f929486ec6904	tree \| snapshot
parent	0e03bc6f48b078606b9a970594ee0ef82ffa0117	commit \| diff

Implement the BIN and IPR bits for attinyX5 and change the ADC sample timing
to roughly match the datasheet. Add a test. Those MCUs have no UART, so
test.c and test.h have changes to use an alternative method.

simavr/cores/sim_tinyx5.h		diff \| blob \| history
simavr/sim/avr_adc.c		diff \| blob \| history
simavr/sim/avr_adc.h		diff \| blob \| history
tests/attiny85_adc_test.c	[new file with mode: 0644]	blob
tests/test_attiny85_adc_test.c	[new file with mode: 0644]	blob
tests/tests.c		diff \| blob \| history
tests/tests.h		diff \| blob \| history

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