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(parent: ec46643) | patch

author	David Given <dg@cowlark.com>
	Sun, 9 Sep 2018 16:25:00 +0000 (18:25 +0200)
committer	David Given <dg@cowlark.com>
	Sun, 9 Sep 2018 16:25:00 +0000 (18:25 +0200)
commit	e88670dad4c74419fc3981fe950fd79a02d3ce7a
tree	99f615455b04d1dab87bc5e4e1538fb3d3a47c79	tree \| snapshot
parent	ec46643124d144b49bb1baebd5d79e9abdea09c2	commit \| diff

Yikes! Turns out that FPU registers are only 32 bits wide, and doubles are
stored in pairs, just like on the PowerPC!

mach/mips/libem/c_ud_i.s		diff \| blob \| history
mach/mips/libem/c_uf_i.s		diff \| blob \| history
mach/mips/mcg/platform.c		diff \| blob \| history
mach/mips/mcg/table		diff \| blob \| history

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