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(parent: 0c8d7ca) | patch
sbcv2: Add support for timer hack mode (DSR wired to a 10Hz clock)
authorAlan Cox <alan@linux.intel.com>
Sat, 25 Aug 2018 20:57:07 +0000 (21:57 +0100)
committerAlan Cox <alan@linux.intel.com>
Sat, 25 Aug 2018 20:57:07 +0000 (21:57 +0100)
commitd0eeca199c9af19358b92332aec977107f0129ca
tree39417b4eed48df484b18cc3d359dd0e3221e2364tree | snapshot
parent0c8d7ca50c7939f6911e7d8230d0d28096809b81commit | diff
sbcv2: Add support for timer hack mode (DSR wired to a 10Hz clock)

Specify timermsr on the command line for this and the kernel will instead of
polling the timers look for DSR signal events on the UART, effectively using
the UART as an interrupt controller.

Still need to support routing ECB interrupts this way.
Kernel/platform-sbcv2/discard.c diff | blob | history
Kernel/platform-sbcv2/main.c diff | blob | history
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