In PowerPC ncg, allocate register for ha16[label].

In PowerPC ncg, allocate register for ha16[label].

Use it to generate code like

    lis r12,ha16[__II0]
    lis r11,ha16[_f]
    lfs f1,lo16[_f](r11)
    lfs f2,lo16[__II0](r12)
    fadds f13,f2,f1
    stfs f13,lo16[_f](r11)

Here ncg has allocated r11 for ha16[_f].  We use r11 in lfs and again
in stfs.  Before this change, we needed an extra lis before stfs,
because ncg did not remember that ha16[_f] was in a register.

This example has a gap between ha16[__II0] and lo16[__II0], because
the lo16 is not in the next instruction.  This requires my previous
commits to allow such a gap.  There is a gap because ncg emits the lis
as soon as I allocate it.  The "lfs f2,lo16[__II0](r12)" happens in a
coercion from IND_RL_W to FSREG.  The coercion allocates one FSREG but
may not allocate any other registers.  So I must allocate r12 earlier.
I allocate r12 in pat lae, but this causes a gap.